74F5074 |
RFQ for 74F5074 |
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| Product | Manufacturers | Pack | D/C |
| 74F5074 | - | 2007 | - |
135ps and To
9.8 X 106 sec where t represents a function of the rate at which a latch in a metastable state resolves that condition and T0 represents a function of the measurement of the propensity of a latch to enter a metastable state.
Features |
| • Metastable immune characteristics• Output skew guaranteed less than 1.5ns• High source current (IOH = 15mA) ideal for clock driver applications• Pin out compatible with 74F74• 74F50728 for synchronizing cascaded Dtype flipflop• See 74F50729 for synchronizing dual Dtype flipflop with edgetriggered set and reset• See 74F50109 for synchronizing dual JK positive edgetriggered flipflop• Industrial temperature range available (40°C to +85°C) |